ycwbycwb 2007-12-30 21:31
32nm high-k/metal gate process in 2H07
[b]IBM alliance members to have 32nm high-k/metal gate process in 2H07[/b]
:nst [color=Blue]IBM has said that its alliance members that include AMD, Chartered Semiconductor, Freescale, Infineon, and Samsung will have its 32nm process ready for use using high-k gate-first approach in the second half of 2009.[/color]
"IBM's alliances have demonstrated the 'high-k gate-first' approach in a manufacturing environment, an achievement that provides clients with a simple, scalable pathway to incorporating the high k material innovation in semiconductor development without introducing additional design complexity," said Gary Patton, Vice President, IBM's Semiconductor Research and Development Center on behalf of IBM's technology alliances. "This industry leading development comes from leveraging the collective engineering talent and breadth of market experience across the six Alliance Partner companies, as well as world-class R&D facilities such as UAlbany NanoCollege's Albany NanoTech complex, in order to maintain an aggressive road map."
Using SOI wafers, IBM claims that in microprocessors the high-k/metal gate process enables up to a 30 percent performance improvement or a 45 percent reduction in power usage.
IBM and its Alliance Partners have also developed a 32nm low-power foundry CMOS process using the 'high-k gate-first' approach that has been demonstrated in an SRAM configuration.
nanost-admin 2007-12-30 21:48
[u][color=Red][b]Scheduled to be "available to IBM alliance members" in the second half of 2009, the new process has demonstrated working silicon at the 32nm process node, including SOI. IBM's partners in the project include AMD, Chartered, Freescale, Infineon, and Samsung.[/b][/color][/u] IBM's laboratory tests in East Fishkill, NY, have confirmed a 45% reduction in total power consumption using their new process, with lower operational voltages. They have indicated this equates to a 30% speedup potential for existing chip applications. IBM has demonstrated the first SRAM chips manufactured using this process on CMOS, containing a 0.15 um2 cell size (picture on left). They have also completed a similar SOI implementation which will be suitable for mass production of future multi-core processors. This newest process technology research is the industry's answer to Intel's hafnium based high-k/metal gate technology, which is currently in use in all 45nm products at Intel. Intel has claimed a 10x reduction in gate leakage and other power and performance improvements with their solution, culminating to approximately the same reduction in overall power--about 30%. [1] The unique high-k material properties enable a transistor speed improvement of greater than 30 percent over the previous generation of high performance Silicon-On-Insulator (SOI) technology. The SRAM demonstrated in this new generation of high performance technology functions at a lower voltage -- an improvement that reduces the energy consumption for microprocessor applications. The use of SOI provides a significant performance and power benefit, which, in combination with the high-k/metal gate advancement, will help the technology deliver energy efficient chips used in applications such as games, personal computers, and high end computing systems. Today's announcement marks the latest development achievement from this alliance of semiconductor manufacturing, development and technology companies that collaborate to address the product design and advanced process development challenges central to producing a smaller, faster, more cost efficient generation of semiconductors.[2] IBM (NYSE: IBM) and its joint development partners -- AMD, Chartered Semiconductor Manufacturing Ltd., Freescale, Infineon, and Samsung -- today announced an innovative approach to speed the implementation of a breakthrough material known as "high-k/metal gate" in next generation 32 nanometer (32nm) computer chips. This new approach, an industry first based on what engineers call a "high-k gate-first" process, is designed to provide a simpler, less time consuming way for clients to migrate to high-k metal gate technology in order to secure benefits that include improved performance and reduced power consumption.[2]
"IBM's alliances have demonstrated the 'high-k gate-first' approach in a manufacturing environment, an achievement that provides clients with a simple, scalable pathway to incorporating the high k material innovation in semiconductor development without introducing additional design complexity," said Gary Patton, vice president, IBM's Semiconductor Research and Development Center on behalf of IBM's technology alliances. "This industry leading development comes from leveraging the collective engineering talent and breadth of market experience across the six Alliance Partner companies, as well as world-class R&D facilities such as UAlbany NanoCollege's Albany NanoTech complex, in order to maintain an aggressive road map." IBM and its Alliance Partners have developed low-power foundry Complementary Metal Oxide Semiconductor (CMOS) technology using the 'high-k gate-first' approach and have demonstrated the first 32nm ultra dense static random access memory (SRAM) in this low power technology with cell sizes below 0.15um2.[2]
The high-k material properties enable a 30 percent transistor speed increase over the previous generation of high performance SOI technology. "This industry-leading development comes from leveraging the collective engineering talent across the six partner companies, as well as world-class R&D facilities, such as the Albany Nanotech Research Center, in order to maintain an aggressive road map," said Gary Patton, vice president, IBM's Semiconductor Research and Development Center. Separately, Intel has made 32nm announcements, but Patton believes "IBM is first in developing working SRAMs in 32nm for both low-power and high-performance applications."[3]
IBM and its Alliance Partners have incorporated the high-k innovation into a new generation of high performance Silicon-On-Insulator (SOI) technology at 32nm.[2] High-k metal gate chips save about 45 percent total power, an increasingly critical metric in all electronics applications. Together these improvements will help to increase functionality and performance with lower power consumption and improved battery life in mobile devices. For microprocessor applications, this innovation also enables up to 30 percent higher performance as documented in measurements performed by IBM and its Alliance Partners at IBM's East Fishkill, NY semiconductor manufacturing facility.[2] Using high-k/metal gate IBM and its Alliance Partners have been able to successfully shrink the size of a chip by up to 50 percent as compared to the previous technology generation while improving a number of other performance specifications.[2] Using high-k/metal gate process technology, IBM and its partners have been able to shrink the size of a chip by up to 50 percent as compared with the 45-nm devices, which are not yet in volume production.[3]
Chips using the new technique will support a range of applications -- from low power computer microchips targeted at wireless and other consumer-oriented devices to high performance microprocessors for games and enterprise computing. This new approach to implementing high-k/metal gate will be available to IBM alliance members and their clients in the second half of 2009.[2] Using SOI wafers, IBM claims that in microprocessors the high-k/metal gate process enables up to a 30 percent performance improvement or a 45 percent reduction in power usage.[4]
On January 29, 2007, IBM and its research partners (including Sony and Toshiba) introduced the "high-k/metal gate" innovation as the basis for a long-sought improvement to the transistor -- the tiny on/off switch that serves as the basic building block of virtually all microchips made today. Using the high-k/metal gate material in a critical portion of the transistor that controls its primary on/off switching function enabled the development of 32nm chip circuitry that is designed to be smaller, faster, and more power-efficient than previously thought possible.[2] The process uses a variant on the same high-k/metal gate technique that replaces some of the silicon in transistors with more efficient, cooler materials to pack more components into a single chip and increase performance.[5]
IBM's solution announced today will not be available until the 32nm process node. This will come in the second half of 2009, though it is likely any commercial products based on the technology will not be out until 2010. IBM's partner, AMD, had mentioned previously during the Technology Analyst day conference call that they were still examining the possbility of incorporating a high-k/metal gate solution at the 45nm process node.[1] Armonk (NY) - IBM announced a new follow-on step to their January 29, 2007 announcement, that of a high-k/metal gate semiconductor process technology.[1]
IBM has said that its alliance members that include AMD, Chartered Semiconductor, Freescale, Infineon, and Samsung will have its 32nm process ready for use using high-k gate-first approach in the second half of 2009.[4] IBM and its Alliance Partners have also developed a 32nm low-power foundry CMOS process using the 'high-k gate-first' approach that has been demonstrated in an SRAM configuration.[4]
The alliance partners have developed and demonstrated a 32nm SRAM with cell sizes below 0.15um2. They have also incorporated high-k silicon-on-insulator (SOI) technology at 32nm for high-performance applications.[3]
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[b]By focusing on the most advanced components first, it lets partner companies design smaller, faster processors without having to increase the chip complexity from the outset. [/b]The New York state-based computer company says it has demonstrated a working example of the 32nm technology with prototype static RAM chips like those found in full-size processors, serving as a proof of concept for future hardware. IBM's development will not see mass production until the second half of 2009 at the earliest but will be used in CPUs and components from partners such as AMD, Infineon, and Samsung. These should reach both conventional computers as well as game consoles and supercomputers. Intel has also developed its own 32nm technology for a similar timeframe but should spread its technology across its line from premium server-class processors to ultra-mobile PCs. [5] Time will only tell whether Apple uses AMD chips or not (or, if Intel licenses/uses this technology).[5]
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[b]SRAMs are a key building block of computer chip designs and an excellent indicator of the readiness of a technology.[/b] The unique characteristics of the high-k material reduces total chip power consumption by as much as a 45 percent compared to the previous generation, a critical technology factor for achieving longer battery life in hand held devices such as cell phones, pagers, and PDAs. [2] IBM said that high-k metal gate chips save about 45 percent total power and offer up to 30 percent higher performance, as documented in measurements performed at IBM's East Fishkill, N.Y., semiconductor-manufacturing facility.[3]
The IBM alliance achievements come at a time when market analyst firm Gartner predicts that, for chip makers, process-development costs for 32 nm could hit $3 billion, twice the level of 65nm process technologies.[3]
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[b]references:[/b]
1. [url=http://www.tgdaily.com/content/view/35196/118/]TG Daily - IBM tips 32nm with high-k gate-first design[/url]
2. [url=http://money.cnn.com/news/newsfeeds/articles/marketwire/0337579.htm]IBM Alliances Deliver Easier Path to Next Generation Semiconductor Products[/url]
3. [url=http://www.eetimes.com/news/latest/showArticle.jhtml?articleID=204800382]EETimes.com - IBM, partners in 32nm device surge[/url]
4. [url=http://www.fabtech.org/content/view/5858/]IBMalliance members to have 32nm high-k/metal gate process in 2H07 -Fabtech - The online information source for semiconductor professionals[/url]
5. [url=http://www.macnn.com/articles/07/12/10/ibm.32nm.processor.tech/]MacNN | IBM intros 32nm processor technology[/url]